Here is an up-to-date, single-source book that offers a complete overview of RISC technologyaas design philosophy, market force, and technology driver. Through its comprehensive coverage, information technology professionals and advanced students learn the fundamentals of RISC design, as well as the trade-offs, limitations, speed, cost, complexity, and implementations of the various architectures. Built on an overall structure that carefully balances theory and practice, this unique book reviews the basics and background of the technology, and then continues with specific case study examples that compare and contrast different implementations. Approaches RISC as a design philosophy and discusses such architectural topics as superscalar, superpipelining, and very-long-instruction-word (VLIW) techniques Examines all the major chip architectures for current and emerging chip systemsamore than 25 different chip families are explored, compared, and contrastedawithout vendor hype Discusses such timely and important application areas as high-performance workstations, embedded systems, personal digital assistants, and multimedia set-top boxes Reviews the history and trends of RISC technology to give the reader a broad per-spective on this rapidly developing field Provides invaluable supplementary materials, including an extensive list of chip manufacturer contacts, a full glossary of technical terms, an up-to-date taxonomy of chip products, over 600 bibliographic citations, and more For hardware and software engineers, system architects and designers, information technology professionals, managers, and advanced students, A Practitioner's Guide to RISC Microprocessor Architecture offers an indispensable resource for working with this dynamic technology.memory-barrier instructions are provided to enforce strong memory ordering when necessary. In V9, all registers are 64 bits, ... The V9 adds 32 single- precision floating-point registers, which can also be sixteen, 64 bit, or eight, 128 bit. There are new ... Sun, derived from the Stanford University Network workstation, was originally implemented with Motorolaa#39;s 68k line of processors. SPARC International isanbsp;...
|Title||:||A Practitioner's Guide to RISC Microprocessor Architecture|
|Author||:||Patrick H. Stakem|
|Publisher||:||Wiley-Interscience - 1996-04-25|