This issue describes processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-VAis, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.The clear trend here is towards advanced millisecond annealing technologies, and the papers include studies of novel flash-lamp and ... Several papers address the recent implementation of high-k/metal gate CMOS in volume manufacturing.
|Title||:||Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4|
|Author||:||P. J. Timans|
|Publisher||:||The Electrochemical Society - 2008-01-01|