This issue of AiECS TransactionsAi describes processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics include strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-VAis, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.The growth rate was significantly higher for the higher deposition temperature: 0.16 nm/cycle at 300 AdC compared to 0.06 nm/cycle ... The performance of the material for these applications is based on changes in the oxidation state of antimonyanbsp;...
|Title||:||Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 5: New Materials, Processes, and Equipment|
|Publisher||:||The Electrochemical Society - 2009-05|