This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.T. Heijmen and A. Nieuwland, aSoft-error rate testing of deep-submicron integrated circuits, a in Proc. of the IEEE European Test ... 1-12, Available: http:// www.altera.corn/literature/wp/wp-O1006.pdf. 29. ... Cadence Design Systems, Inc ., San Jose, CA, Envisia Silicon Ensemble Place-and-route Reference Manuals, Nov 1999.
|Title||:||Analysis and Design of Resilient VLSI Circuits|
|Publisher||:||Springer Science & Business Media - 2009-10-22|