The adder architecture used in this generator is a hybrid of Brent aamp; Kung, carry select, and ripple carry adders. ... Using these, adders can be generated for a variety of design goals, bit-widths, and process technologies. ... synthesis tool, which allows further enhancement such as, pipelining, retiming, GUI interface, and adder instantiation in a Verilog like language called MCL (Module compiler language).
|Title||:||IEEE International Symposium on Circuits and Systems|
|Author||:||IEEE Circuits and Systems Society|
|Publisher||:||Institute of Electrical & Electronics Engineers(IEEE) - 1992-04|