Low Power Circuits for Miniature Sensor Systems

Low Power Circuits for Miniature Sensor Systems

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With the development of VLSI technologies, the sensor systems of all kinds of applications have entered our everyday's life. For specific applications such as medical implants, the form factor of such systems is the crucial concern. In order to minimize of size of the power sources with a given lifetime, the ability to operate the system with low power consumption is the key. An effective way of lowering the active power dissipation is through aggressive voltage scaling. For minimal energy operation, the optimum supply voltage is typical lower than the subthreshold voltage. On the other hand, a sensor system spends most of the time idling while only actively obtaining data in a short period of time. As a result, strong power gating is needed for reducing the leakage power. We discuss the design challenges for several building blocks for the sensor system that have not been gotten much emphasis in term of power consumption. To monitor the period for idle time and to wake up the system periodically, two types of ultra low power timers are proposed. The first one utilizes the gate leakage of a MOS transistor to achieve low temperature dependency and large time constant. The second one implements a program-and-hold technique to compensate for the temperature coefficient of a one-shot oscillator with 150pW of average power. We propose a low power temperature sensor that is suitable for passive RFID transponder. To retrieve the data out of the sensor chip, two passive proximity communication schemes are presented. Capacitive coupling can be used for chips on a stack where the key challenge is misalignment. A alignment detection and microplate reconfiguration method is proposed to solve the problem. We also propose a passive inductive coupling scheme using pulse signaling. Compared to the traditional backscattering technique, the limitations on the quality factor of the inductor and the signal sensitivity of the receiver can be relaxed.Simulation results show 1/xs for Vref to attain the steady state which is at least 20 times better than the circuit without the startup stage. The block diagram of the PLL is shown in Fig. 6.5. A type II PLL is used for locking into a wider range ofanbsp;...

Title:Low Power Circuits for Miniature Sensor Systems
Publisher:ProQuest - 2008


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