Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS addresses the low-power low-voltage Sigma-Delta ADC design in nanometer CMOS technologies at both the circuit-level and the system level. The low-power low-voltage Sigma-Delta modulator design at the circuit level is introduced. A design example is presented in this book. This design is the first published Sigma-Delta design in a 90-nm CMOS technology and reaches a very high figure-of-merit. At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.This chapter addresses the trend of nanometer CMOS technologies and its impact to analog IC designs, especially for ADC ... Soon it has become clear that the dimensions of the CMOS devices could be scaled-down more easily than otheranbsp;...
|Title||:||Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS|
|Author||:||Libin Yao, Michiel Steyaert, Willy M. C. Sansen|
|Publisher||:||Springer Science & Business Media - 2006-02-06|