On-Chip Communication Architectures

On-Chip Communication Architectures

4.11 - 1251 ratings - Source

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial RaD efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years... 360a€“361 Digital signal processors (DSPs), 3, 18a€“19 3-D interconnects, 427a€“ 429 Direct memory access (DMA), 19, ... driver, 304 Duplicate-add-parity (DAP) code, 291 See also Parity check code Dynamic address compression scheme, 273 ... 332a€“333 Dynamic bus architecture reconfiguration parameter, 318a€“331 communication architecture tuners (CAT), ... 452 Dynamic simulation-based techniques, 378a€“385 Dynamic TDMA timeslot allocation (dTDMA), 330a€“331 Dynamicanbsp;...

Title:On-Chip Communication Architectures
Author:Sudeep Pasricha, Nikil Dutt
Publisher:Morgan Kaufmann - 2010-07-28


You Must CONTINUE and create a free account to access unlimited downloads & streaming