On-Line Testing for VLSI

On-Line Testing for VLSI

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Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.It was shown that PC-based STCs built of full- and halfadders can be designed for about twice as many m/n codes with m agt; 4 (n agt; ... References 1. W.C. Carter and PR. Schneider, a€œDesign of Dynamically Checked Computers, a€ Proc. IFIP Conf ... 301a€“309, March 1988. 8. S.J. Piestrak, a€œDesign Method of Totally Self- Checking Checkers for m-out-of-n Codes. ... V. Sapozhnikov, a€œUniversal Algorithm for Synthesizing Self-Checking Testers for Constant-Weight Codes. ... Remote Control, Vol.

Title:On-Line Testing for VLSI
Author:Michael Nicolaidis, Yervant Zorian, Dhiraj Pradhan
Publisher:Springer Science & Business Media - 2013-03-09


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