Written for computer hardware and software engineers, this book offers insights into how the Pentium family of processors translates legacy x86 code into RISC instructions, executes them out-of-order, and then reassembles the results to match the original program flow. This new edition includes coverage of the differences between the Pentium Pro and the Pentium II processors, in particular the Slot 1 connector and the processor cartridge design utilized by the Pentium II and intended for use in future Intel processors. It reviews the Pentium II's support for the MMX instruction set and registers, shows how this is optimized for 16-bit code execution, and describes the processor's support for the Fast System Call instructions SYSENTER and SYSEXIT. The book also describes the Pentium II's L2 cache and its support for power-conservation modes.7-11 Data Path between L2 and LI Caches 183 7-12 The LI Data and L2 Cache Pipeline Stages 186 7-13 Example of ... and Hold Specs 204 8-5 Example 205 9- 1 Block Diagram of a Typical Server System 210 9-2 Bus Signal Groups 213 9-3 anbsp;...
|Title||:||Pentium Pro and Pentium II System Architecture|
|Publisher||:||Addison-Wesley Professional - 1998|