Planar Processing Primer is based on lecture notes for a silicon planar process ing lecture/lab course offered at the University of Illinois-UC for over fifteen years. Directed primarily to electrical engineering upperclassmen and graduate students, the material also has been used successfully by graduate students in physics and ceramic and metallurgical engineering. It is suitable for self-study by engineers trained in other disciplines who are beginning work in the semiconductor fields, and it can make circuit design engineers aware of the processing limitations under which they must work. The text describes and explains, at an introductory level, the principal processing steps used to convert raw silicon into a semiconductor device or integrated circuit. First-order models are used for theoretical treatments (e.g., of diffusion and ion implantation), with reference made to more advanced treatments, to computer programs such as SUPREM that include higher order effects, and to interactions among sequential processes. In Chapters 8, 9, and to, the application of silicon processes to compound semiconductors is discussed briefly. Over the past several years, the size of transistors has decreased markedly, allowing more transistors per chip unit area, and chip size has increased.The phase diagram is shown in Figure 4aP-1. Sn - Pb Phase diagram 700 500 MPs, 400 : ~IP 361 #: - - - - -Disi- |- - - - - - - - - - =(-|--|. 300 aa | | 600 H MPPb | | | | | | : 200 100 (a) Describe the phases present, giving the composition and weight.
|Title||:||Planar Processing Primer|
|Publisher||:||Springer Science & Business Media - 2012-12-06|