This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology.Different techniques are proposed to reduce the test power during both shift cycle and capture cycle. ... power for a set of specimen circuits by using the proposed scan flip-flop and the amount of power saving by using the gating technique. ... The switch level circuit diagram of proposed scan flip-flop is as shown in Fig. 1(A) .
|Title||:||Progress in VLSI Design and Test|
|Author||:||Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay|
|Publisher||:||Springer - 2012-06-26|