This revised and updated third edition outlines a set of best practices for creating reusable designs for use in an System-on-a-Chip (SoC) design methodology. These practices are based on the authors' experience in developing reusable designs, as well as the experience of design teams in many companies around the world.As reuse has matured, Verification IP (VIP)asuch as Bus Functional M (BFMs), monitors, and test suitesahave become more important. Figure . page 66 shows how a USB bus functional model and bus monitor, as well as a of a DRAM, cananbsp;...
|Title||:||Reuse Methodology Manual for System-on-a-Chip Designs|
|Publisher||:||Springer Science & Business Media - 2007-05-08|